20 meilleures offres (lab development engineer) (à pourvoir)

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- 100%
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ETH Zürich —Zürich, ZH
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Thermo Fisher Scientific —Lengnau, BE
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Adaptyv —Lausanne, VD
- 100%
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Viasat —Lausanne, VD
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Anza —Zürich, ZH
- 100%
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Senior Software Engineer
Mettler Toledo —Nänikon, ZH
- Bar
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il y a 10 jours
Technology Development Manager MAP (f/m/d)
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Mechanical Engineering Intern
Voliro AG —Zürich, ZH
- 2 500 CHF par mois
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- Compétences en communication
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Forward Deployed Engineer
Adaptyv —Lausanne, VD
- 100%
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Senior Cloud Engineer
Voliro AG —Zürich, ZH
- 100%
- Niveau Master
- C++
- JavaScript
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il y a 10 jours
Senior Hardware Design Engineer
u-blox —Thalwil, ZH
- Expérience en laboratoire
- Anglais
- Niveau Master

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Technical Advisor/Principal Architect, Office of the CTO

Kandou AI
Saint-Sulpice, VD

Postuler rapidement

Détails de l'emploi

100%
Il y a 3 jours

Qualifications

MATLAB
Esprit d'analyse
C++
Python

Description complète du poste

Kandou AI is redefining the economics of AI infrastructure. Our proprietary MIMO‑over‑copper technology powers a high‑performance, chiplet‑based AI memory fabric that delivers high bandwidth and ultra‑low latency at dramatically lower power. Our architecture represents a foundational shift in how next‑generation AI hardware is built.

We are seeking a Technical Advisor / Principal Architect to work directly with the CTO on the conception, modeling, and development of breakthrough communication and interconnect technologies.

This is a rare opportunity for an engineer who thrives at the intersection of theory, architecture, and silicon implementation — someone who wants to help shape the future of chip‑to‑chip, die‑to‑die, memory, and networking interconnects.

Role Overview

You will partner closely with the CTO to explore, evaluate, and prototype next‑generation communication system architectures. This role spans research, modeling, algorithm development, system architecture, and early‑stage silicon feasibility. You will help translate theoretical concepts into implementable designs that can scale into real products.

What You Will Do

Partner with the CTO to develop next-generation communication and interconnect architectures.
Explore novel signaling, coding, equalization, and system-level techniques.
Build models, simulations, and prototypes to validate architectural concepts.
Evaluate performance, power, latency, area, and manufacturability tradeoffs.
Translate research into silicon-ready architectures and intellectual property.
Identify emerging technologies and opportunities for competitive differentiation.
Provide technical leadership and guidance across research, architecture, and product teams

Required Qualifications

Advanced degree in Electrical Engineering, Computer Engineering, Applied Mathematics, Physics, or related field.
Strong background in digital communications and communication system fundamentals.
Deep understanding of information theory, coding, modulation, and signal processing.
Experience building mathematical models, simulations, or prototypes.
Proficiency in Python, MATLAB, C++, or similar environments.
Ability to work across abstraction levels — from theory to architecture to implementation.
Strong analytical and problem‑solving skills; comfortable exploring unfamiliar domains.

Highly Desirable Experience (streamlined)

SerDes architecture, equalization, or wireline communications.
Coding theory, FEC, or advanced modulation schemes.
System‑level modeling (SystemC or equivalent).
Machine learning applied to communications.
Experience taking concepts from theory to silicon.

What Makes Someone Successful in This Role

The ideal candidate:

Moves fluidly between mathematics, algorithms, architecture, and hardware.
Is willing and able to be hands-on when needed, diving into analysis, modeling, coding, simulation, debugging, or lab work to help move critical projects forward.
Is intellectually curious and thrives on open‑ended technical challenges.
Challenges assumptions and proposes unconventional approaches when needed.
Understands that elegant theory must ultimately translate into manufacturable silicon.

Postuler rapidement

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